What’s difference between BE8 and BE32?
BE-32 is supported by ARM cores up to the ARM11 family (v6) (for example ARM7TDMI, ARM926EJ-S, ARM1136JF-S). It is enabled by setting a bit in the CP15 system control coprocessor.
BE-8 is supported by the ARM11 family and later (for example ARM1136JF-S, Cortex-R4, Cortex-A8). Architecture v7 cores do not support BE-32.
It is controlled by setting a bit in the CPSR.
Setting both bits is reserved (not a valid configuration).
In terms of data access:
BE-8 is byte invariant endianness
BE-32 is word invariant endianness
This is easiest to see with examples. I’ve starred **** the important ones:
Basic endianness:
Consider a word stored 0x11223344 where 11 is the most significant byte.
Little endian:
Address 0 1 2 3
Data 44 33 22 11
Big endian:
Address 0 1 2 3
Data 11 22 33 44
BE-32 and BE-8
Now consider data stored like this:
Address 0 1 2 3
Data 11 22 33 44
Core in little-endian mode makes word access to address 0:
LDR r0, [0]
r0 contains 0x44332211
Data loaded to register as little endian
Core in little-endian mode makes byte access to address 0:
LDRB r0, [0]
r0 contains 0x00000011
Data loaded from 0
Core in little-endian mode makes byte access to address 3:
LDRB r0, [3]
r0 contains 0x00000044
Data loaded from 3
Core in BE-32 mode makes word access to address 0:
LDR r0, [0]
r0 contains 0x44332211
Word accesses are endianness-invariant
****Core in BE-32 mode makes word access to address 0:
LDRB r0, [0]
r0 contains 0x00000044
Byte access in BE-32 reads the word as if it was stored big-endian
Core in BE-32 mode makes word access to address 3:
LDRB r0, [1]
r0 contains 0x00000011
As above
****Core in BE-8 mode makes word access to address 0:
LDR r0, [0]
r0 contains 0x11223344
Data loaded to register as big endian
Core in BE-8 mode makes byte access to address 0:
LDRB r0, [0]
r0 contains 0x00000011
Byte at address 0 is loaded, NOT the byte at address 3
Core in BE-8 mode makes byte access to address 3:
LDRB r0, [3]
r0 contains 0x00000044
Byte at address 3 is loaded.
Essentially BE-32 operates by altering the addresses of memory accesses when accessing subword quantities. This gives the appearances of big endian.
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